2016-10-11 08:09:46 +08:00
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timer:
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ac: Advacned control(quad,4x input capture/output compare,brk,deadtime,3x inverted output,itr)
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gp1: General purpose(quad,4x input capture/output compare,itr)
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gp2: General purpose(2x input capture/output compare,itr)
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gp3: General purpose(1x input capture/output compare)
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2016-10-11 05:08:24 +08:00
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ba: basic
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2016-10-11 08:09:46 +08:00
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adc: adc trigger via compare/trgo
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itr: internal trigger, ITR0-3
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d: dma request
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2016-10-11 05:08:24 +08:00
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b: bits
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2016-10-11 08:09:46 +08:00
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APB2 DMA2 168 MHz
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TIM1(ac,16b,d(cc1,cc2,cc3,cc4,trgo,up,com),adc(cc1,cc2,cc3),itr(5,2,3,4)) enc_cmd
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TIM8(ac,16b,d(cc1,cc2,cc3,cc4,up,trgo,com),adc(cc1,trgo),itr(1,2,4,5)) res_master,adc
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TIM9(gp2,16b,itr(2,3,10,11))
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TIM10(gp3,16b)
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TIM11(gp3,16b)
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2016-10-11 05:08:24 +08:00
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USART1 io_header,cmd_rx
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USART6
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2016-10-11 08:09:46 +08:00
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APB1 DMA1 84 MHz
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TIM2(gp1,32b,d(up,cc1,cc2,cc3,cc4),adc(cc2,cc3,cc4,trgo),itr(1,8,3,4)) res_slave,res_oc
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TIM3(gp1,16b,d(cc1,cc2,cc3,cc3,up,trgo),adc(cc1,trgo),itr(1,2,5,4)) enc_fb
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TIM4(gp1,16b,d(cc1,cc2,cc3,up),adc(cc4),itr(1,2,3,8))
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TIM5(gp1,32b,d(cc1,cc2,cc3,cc4,trgo),adc(cc1,cc2,cc3),itr(2,3,4,8))
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TIM6(ba,16b,d(up))
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TIM7(ba,16b,d(up))
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TIM12(gp2,16b,itr(4,5,13,14))
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TIM13(gp3,16b)
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TIM14(gp3,16b)
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2016-10-11 05:08:24 +08:00
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USART2 f1_hv
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USART3 fb
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UART4
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UART5 cmd
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